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Homebrew Mini-Computer based on Z80 CPU |
armandoacostawong@gmail.com |
ROM-TAPEs are cartridges with information stored in EPROM that provide read-only storage for the LC-81 minicomputer. A variant of ROM-TAPE also contains some provision of RAM to be used as "scratch tape" for temporary files.
The cartridge can be hot-plugged into a "ROM-TAPE DRIVE" device by the mean of a 40-pins DIP connector. The DRIVE contains special logic to access the cartridge content from a single 8-bits port, so it does not occupy any space in the EXT-BUS memory address space.
The cartridge per se has no electronics other than the memory chips and some resistors.
ROM-TAPEs are compatible with the VTFS file system.
A cartridge holds a single file or a group or files according VTFS rules. The file is organized into blocks of 256 bytes. Read operations transfer one block at the time by consecutive read cycles over the input port. Maximum number of blocks is 256, hence the maximum size for a file in ROM-TAPE is 64 KB.
Internally, the memory is broken into pages or 8 KB each, possibly implemented with separate memory chips of that capacity. This is to allow the probation of RAM in the same cartridge in which case the RAM always occupy the last portion of the space.
Programs access the cartridge content by reading or writing 8-bits registers in the ROM-TAPE DRIVE. These registers are the following:
* Register D (Data)
* Register B (Block Number)
There is also an internal register (not accessible to programs) called C (byte Count).
Writing to register B sets the initial block to be read, and resets C.
Read operations from register D reads a byte from the file; this byte is that in the block indicated by B with the offset indicated by register C. After reading D, C is incremented automatically so the next read operation gets the next byte from the file in the same block. After 256 consecutive read operations, B is incremented and C is reset, so reading continues at the next block.
If the ROM-TAPE contains RAM, programs can perform write operations to register D. The same addressing rules apply.
The exact pinout for the 40 pins DIP connector is pending design. The following is a very first approach.
* Power and Ground
* Select (S0-S7) (select page)
* Address (A0-A12) (address within given page)
* RD
* WR
* Data (D0-D7)
* Config (6 bits)
S0-S7 connect directly to the Chip Select pins of the memory chips. Only one of the S0-S7 lines can be active at the same time.
A0-A12 address the selected chip.
RD and RW are used for memory cycles.
D0-D7 connect the memory chips to the DRIVE register D.
The Config lines inform the DRIVE about the cartridge configuration in terms of how much ROM and RAM in contains, as following:
* C0-C2: How many pages for ROM
* C3-C5: How many pages for RAM
This read-only register is implemented by jumpers to ground and pull-up resistors to +5V.